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Intel® Packaging Databook

Purpose of the Databook

The Intel® Packaging Databook is intended to serve only as a data reference guide to Intel package selection and availability. As the packaging landscape changes very rapidly, information can become outdated very quickly.  Please refer to the product specs on the Intel Developer Web Site for the most current detailed package information.

Chapter 1: Introduction (271 KB)

An overview of package families, including package attributes, package types, and a package selection guide.

Chapter 2: Package/Module/PC Card Outlines and Dimensions (1966 KB)

A detailed view into Intel package outlines and dimensions.

Chapter 3: Alumina and Leaded Molded Technology (205 KB)

Statistical tools used in the manufacturing process. Also included is a comprehensive analysis of Intel's IC assembly manufacturing technology and process flow.

Chapter 4: Performance Characteristics of IC Packages (747 KB)

Package characteristics and data for electrical, mechanical, and thermal IC package characteristics.

Chapter 5: Physical Constants of IC Package Materials (101 KB)

Physical constants of IC package materials. This chapter provides valuable information on mechanical, electrical, and thermal properties of case materials, lead/leadframes, and soldering material characteristics.

Chapter 6: ESD/EOS (53 KB)

An overview of electrical static discharge and electrical over stress. ESD/EOS precautions are described.

Chapter 7: Leaded Surface Mount Technology (SMT) (101 KB)

A review of the mass reflow soldering technologies of printed circuit board (PCB) component assembly termed SMT (surface mount technology).

Chapter 8: Moisture Sensitivity/Desiccant Packaging/Handling of PSMCs (269 KB)

Desiccant Packing Methods and Materials. The six levels of moisture sensitivity for packages is also examined.

Chapter 9: Board Solder Reflow Process Recommendations - Leaded SMT (174 KB)

A review of Board Solder Reflow Process Information.

Chapter 10: Transport Media and Packing (511 KB)

Various packing and shipping methods used at Intel. Packing media, desiccant pack materials, and shipping data are illustrated.

Chapter 11: International Packaging Specifications (38 KB)

A listing of international packaging specifications and a comprehensive resource library.

Chapter 12: Tape Carrier Package (292 KB)

A profile of the Tape Carrier Package and its uses in areas that require lightweight small footprint integrated circuits.

Chapter 13: Pinned Packaging (751 KB)

An overview of Plastic Pin Grid Array package technology, and its physical structure, electrical modeling and performance.

Chapter 14: Ball Grid Array (BGA) Packaging (795 KB)

A profile of the Plastic Ball Grid Array package technology detailing its physical structure, electrical modeling, performance, and other aspects of the PBGA package.

Chapter 15: The Chip Scale Package (CSP) (212 KB)

An overview of the Micro Ball Grid Array, and its physical structure, electrical modeling, and performance.

Chapter 16: Cartridge Packaging (476 KB)

An overview of Cartridge Packaging and its physical structure, electrical modeling, and performance.

Chapter 17: Glossary (81 KB)

Packaging Databook terminology defined.

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